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  fn6454 rev 4.00 page 1 of 9 february 16, 2012 fn6454 rev 4.00 february 16, 2012 ISL97519 1% output accuracy 600khz/1.2mhz pwm step-up regulator datasheet the ISL97519 is a high frequency, high efficiency step-up voltage regulator operated at constant frequency pwm mode. with an internal 2.0a, 200m ? mosfet, it can deliver up to 1a output current at over 90% efficiency. the selectable 600khz and 1.2mhz allows smaller inductors and faster transient response. an external compensati on pin gives the user greater flexibility in setting frequency compensation allowing the use of low esr ceramic output capacitors. when shut down, it draws <1a of current and can operate down to 2.3v input supply. these features, along with 1.2mhz switching frequency, make it an ideal device for portable equipment and tft-lcd displays. the ISL97519 is available in an 8 ld msop package with a maximum height of 1.1mm. the device is specified for operation over the full -40c to +105c temperature range. pin configuration ISL97519 (8 ld msop) top view features ?1% output accuracy ? >90% efficiency ? 2.0a, 200m ? power mosfet ? 2.3v to 5.5v input ? 1.1*vin to 25v output ? 600khz/1.2mhz switching frequency selection ? adjustable soft-start ? internal thermal protection ? 1.1mm max height 8 ld msop package ? pb-free (rohs compliant) ?halogen free applications ?tft-lcd displays ?dsl modems ?pcmcia cards ? digital cameras ?gsm/cdma phones ? portable equipment ? handheld devices fb fsel en vdd gnd lx comp ss 1 2 3 4 8 7 6 5 ordering information part number (notes 2, 3) part marking package (pb-free) pkg. dwg. # ISL97519iuz 7519z 8 ld msop m8.118a ISL97519iuz-t 7519z 8 ld msop m8.118a ISL97519iuz-tk 7519z 8 ld msop m8.118a notes: 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ special pb- free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb -free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb- free requirements of ipc/jedec j std-020. 3. for moisture sensitivity level (msl), please see device information page for ISL97519 . for more information on msl please see techbrief tb363 . o b s o l e t e p r o d u c t r e c o m m e n d e d r e p l a c e m e n t p a r t is l 9 7 51 9 a
ISL97519 fn6454 rev 4.00 page 2 of 9 february 16, 2012 absolute maximum ratings (t a = +25 c) thermal information lx to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27v v dd to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5v comp, fb, en, ss, fsel to gnd . . . . . . . . . . . . . . . . . .-0.3v to (v dd + 0.3v) thermal resistance (typical, note 4) ? ja (c/w) 8 lead msop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c operating ambient temperature . . . . . . . . . . . . . . . . . . . .-40c to +105c operating junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+135c power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see curves pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/ pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 4. ? ja is measured with the component mounted on a high effective thermal conductivity test board in free air. see tech brief tb379 for details. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v in = 3.3v, v out = 12v, i out = 0ma, fsel = gnd, t a = -40c to +105c unless otherwise specified. boldface limits apply over the operating temperature range, -40c to +105c. parameter description conditions min (note 5) typ max (note 5) unit i q1 quiescent current - shutdown en = 0v 1 5 a i q2 quiescent current - not switching en = v dd , fb = 1.3v 0.7 ma i q3 quiescent current - switching en = v dd , fb = 1.0v 3 4 ma v fb feedback voltage t a = -40c to +85c 1.281 1.294 1.307 v t a = -40c to +105c 1.276 1.294 1.307 v i b-fb feedback input bias current 0.01 0.5 a v dd input voltage range 2.3 5.5 v d max - 600khz maximum duty cycle fsel = 0v 85 92 % d max - 1.2mhz maximum duty cycle fsel = v dd 85 90 % i lim current limit - max peak input current 1.5 2.0 a i en shutdown input bias current en = 0v 0.01 0.5 a r ds(on) switch on-resistance v dd = 2.7v, i lx = 1a 0.2 ? i lx-leak switch leakage current vsw = 27v 0.01 3 a ? v out / ? v in line regulation 3v < v in < 5.5v, v out = 12v 0.2 % ? v out / ? i out load regulation v in = 3.3v, v out = 12v, i o = 30ma to 200ma 0.3 % f osc1 switching frequency accuracy fsel = 0v 500 620 740 khz f osc2 switching frequency accuracy fsel = v dd 1000 1250 1500 khz v il en, fsel input low level 0.5 v v ih en, fsel input high level 1.5 v g m error amp tranconductance ? i = 5a 70 130 150 1/ ? v dd-on v dd uvlo on threshold 2.1 2.2 2.3 v hys v dd uvlo hysteresis 100 mv i ss soft-start charge current 4 6 8 a otp over-temperature protection 150 c note: 5. parameters with min and/or max limits are 100% tested at +25c , unless otherwise specified. te mperature limits established by characterization and are not production tested.
ISL97519 fn6454 rev 4.00 page 3 of 9 february 16, 2012 block diagram typical application circuit comparator oscillator shutdown and start-up control lx vdd fsel en ss reference generator pwm logic controller fet driver current sense gm amplifier gnd fb comp pin number pin name description 1 comp compensation pin. output of the internal error amplifier. capacitor and resistor from comp pin to ground. 2 fb voltage feedback pin. internal reference is 1. 294v nominal. connect a resistor divider from v out . v out = 1.294v (1 + r 1 /r 2 ). see ?typical application circuit?. 3 en shut-down control pin. pull en low to turn off the device. 4 gnd analog and power ground. 5 lx power switch pin. connected to the drain of the internal power mosfet. 6 vdd analog power supply input pin. 7 fsel frequency select pin. when fsel is set low, switch ing frequency is set to 620khz. when connected to high or v dd , switching frequency is set to 1.25mhz. 8 ss soft-start control pin. connect a capacitor to control the converter start-up. 1 2 3 4 8 7 6 5 comp fb en gnd ss fsel vdd lx + + 3.9k ? 4.7nf 27nf 22f c 3 c 1 0.1f 10h d 1 22f c 2 12v 2.3v to 5.5v r 3 c 5 85.2k ? r 1 10k ? r 2 c 4 s1
ISL97519 fn6454 rev 4.00 page 4 of 9 february 16, 2012 typical performance curves figure 1. boost efficiency vs i out figure 2. boost efficiency vs i out figure 3. load regulation vs i out figure 4. load regulation vs i out figure 5. line regulation vs v in figure 6. transient response 60 65 70 75 80 85 90 95 0 200 400 600 800 1000 i out (ma) efficiency (%) v in = 5v, v o = 12v, f s = 620khz v in = 5v, v o = 12v, f s = 1.25mhz v in = 5v, v o = 9v, f s = 620khz v in = 5v, v o = 9v, f s = 1.25mhz 74 76 78 80 82 84 86 88 90 92 0 100 200 300 400 500 i out (ma) efficiency (%) v in = 3.3v, v o = 12v, v in = 3.3v, v o = 9v, v in = 3.3v, v o = 9v, v in = 3.3v, v o = 12v, f s = 1.25mhz f s = 1.25mhz f s = 620khz f s = 620khz 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 200 400 600 800 1000 i out (ma) load regulation (%) v in = 5v, v o = 12v, f s = 620khz v in = 5v, v o = 9v, f s = 1.25mhz v in = 5v, v o = 12v, f s = 1.25mhz v in = 5v, v o = 9v, f s = 620khz 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 100 200 300 400 500 i out (ma) load regulation (%) v in = 3.3v, v o = 12v, f s = 1.25mhz v in = 3.3, v o = 12v, f s = 620khz v in = 3.3, v o = 9v, f s = 1.25mhz f s = 1.25mhz v in = 3.3v, v o = 9v, -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 2 v in (v) line regulation (%) 3 4 5 6 v o = 12v, i o = 80ma f s = 1.25mhz v o = 12v, i o = 80ma f s = 620khz v o = 9v, i o = 100ma f s = 620khz v o = 9v, i o = 80ma f s = 1.25mhz v o = 12v f s = 600khz v in = 3.3v i o = 50ma to 300ma
ISL97519 fn6454 rev 4.00 page 5 of 9 february 16, 2012 applications information the ISL97519 is a high frequency, high efficiency boost regulator operated at consta nt frequency pwm mode. the boost converter stores energy from an input voltage source and delivers it to a higher output voltage. the input voltage range is 2.3v to 5.5v and the output voltage range is 5v to 25v. the switching frequency is selectable between 600khz and 1.2mhz allowing smaller inductors and faster transient response. an external compensati on pin gives the user greater flexibility in setting output transient response and tighter load regulation. the converter soft-start characteristic can also be controlled by the external c ss capacitor. the en pin allows the user to completely shut-down the device. boost converter operations figure 10 shows a boost converter with all the key components. in steady-state operating and continuous conduction mode where the induct or current is continuous, the boost converter operates in two cycles. during the first cycle, as shown in figure 11, the internal power fet turns on and the schottky diode is reverse biased and cuts off the current flow to the output. the output current is supplied from the output capacitor. the voltage across the inductor is v in and the inductor current ramps up in a rate of v in /l, l is the inductance. the inductance is ma gnetized and energy is stored in the inductor. the change in inductor current is shown in equation 1: figure 7. transient response figure 8. package power dissipation vs ambient temperature figure 9. package power dissipation vs ambient temperature typical performance curves (continued) v o = 12v f s = 1.2mhz v in = 3.3v i o = 50ma to 300ma jedec jesd51-7 high effective thermal conductivity test board 1.0 0.9 0.6 0.4 0.3 0.2 0.1 0 0 25 50 75 100 125 ambient temperature (c) power dissipation (w) 85 870mw ? j a = + 1 6 0 c / w m s o p 8 0.8 0.5 0.7 jedec jesd51-3 low effective thermal conductivity test board 0.6 0.4 0.3 0.2 0.1 0.0 0 255075100125 ambient temperature (c) power dissipation (w) 85 486mw ? j a = + 2 0 6 c / w m s o p 8 0.5 ? i l1 ? t1 v in l -------- ? = ? t1 d f sw --------- - = dduty cycle = ? v o i out c out ------------- ? t 1 ? = (eq. 1)
ISL97519 fn6454 rev 4.00 page 6 of 9 february 16, 2012 during the second cycle, the power fet turns off and the schottky diode is forward biased, (see figure 12). the energy stored in the inductor is pumped to the output supplying output current and charging the output capacitor. the schottky diode side of the inductor is clamped to a schottky diode above the output voltage. so the voltage drop across the inductor is v in - v out . the change in inductor current during the second cycle is shown in equation 2: for stable operation, the same amount of energy stored in the inductor must be taken out. the change in inductor current during the two cycles must be the same. output voltage an external feedback resistor divider is required to divide the output voltage down to the nominal 1.294v reference voltage. the current drawn by the resistor network should be limited to maintain the overall converter efficiency. the maximum value of the resistor network is limit ed by the feedback input bias current and the potential for noise being coupled into the feedback pin. a resistor network less than 100k is recommended. the boost converter output voltage is determined by the relationship in equation 4: the nominal vfb voltage is 1.294v. inductor selection the inductor selection determin es the output ripple voltage, transient response, output current capability, and efficiency. its selection depends on the input voltage, output voltage, switching frequency, and maximum output current. for most applications, the inductance shou ld be in the range of 2h to 33h. the inductor maximum dc current specification must be greater than the peak inductor current required by the regulator. the peak inductor current can be calculated using equation 5: output capacitor low esr capacitors should be used to minimize the output voltage ripple. multilayer ceramic capacitors (x5r and x7r) are preferred for the output capacitors because of their lower esr and small packages. tantalum capacitors with higher esr can also be used. the output ripple can be calculated in equation 6: for noise sensitive applications, a 0.1f placed in parallel with the larger output capacitor is recommended to reduce the switching noise coupled from the lx switching node. ? i l ? t2 v in v out C l --------------------------- - ? = ? t2 1d C f sw ------------ - = (eq. 2) ? i1 ? i2 + 0 = --------- - v in l -------- 1d C f sw ------------ - v in v out C l --------------------------- - ? + ? 0 = ------------ - 1 1d C ------------ - = (eq. 3) ISL97519 c out c in ld v in v out figure 10. boost converter ISL97519 c out c in l v in v out ? t 1 ? v o i l ? i l1 figure 11. boost converter - cycle 1, power switch closed ISL97519 c out c in ld v in v out ? t 2 ? v o ? i l2 i l figure 12. boost converter - cycle 2, power switch open v out v fb 1 r 1 r 2 ------ - + ?? ?? ?? ? = (eq. 4) i lpeak ?? i out v out ? v in ------------------------------ - 12 ? v in v out v in C ?? ? lv out freq ? ? ----------------------------------------------- ? + = (eq. 5) ? v o i out d ? f sw c o ? ----------------------- i out esr ? + = (eq. 6)
ISL97519 fn6454 rev 4.00 page 7 of 9 february 16, 2012 schottky diode in selecting the schottky diode, the reverse break down voltage, forward current and fo rward voltage drop must be considered for optimum converter performance. the diode must be rated to handle 2.0a, the current limit of the ISL97519. the breakdown voltage must exceed the maximum output voltage. low forward volt age drop, low leakage current, and fast reverse recovery will help the converter to achieve the maximum efficiency. input capacitor the value of the input capacito r depends upon the input and output voltages, the maximum output current, the inductor value and the noise allowed to put back on the input line. for most applications, a minimum 10f is required. for applications that run close to the maximum output current limit, an input capacitor in the range of 22f to 47f is recommended. the ISL97519 is powered from the vin. a high frequency 0.1f bypass cap is recommended to be close to the vin pin to reduce supply line noise and ensure stable operation. loop compensation the ISL97519 incorporates a transconductance amplifier in its feedback path to allow the us er some adjustment on the transient response and better regulation. the ISL97519 uses current mode control architecture, which has a fast current sense loop and a slow voltage fe edback loop. the fast current feedback loop does not require any compensation. the slow voltage loop must be compensa ted for stable operation. the compensation network is a seri es rc network from comp pin to ground. the resistor sets the high frequency integrator gain for fast transient response and the capacitor sets the integrator zero to ensure loop stability. for most applications, the compensation resistor is in the range of 2k to 7.5k and the compensation capacitor is in the range of 3nf to 10nf. soft-start the soft-start is provided by an internal 6a current source, which charges the external c ss ; the peak mosfet current is limited by the voltage on the capacitor. this in turn controls the rising rate of the output voltage. the regulator goes through the start-up sequence as well, af ter the en pin is pulled to hi. frequency selection the ISL97519 switching frequency can be user selected to operate at either constant 620khz or 1.25mhz. connecting fsel pin to ground sets th e pwm switching frequency to 620khz. when connecting fsel high or vdd, the switching frequency is set to 1.25mhz. shut-down control when the en pin is pulled down, the ISL97519 is shut down reducing the supply current to <1a. maximum output current the mosfet current limit is no minally 2.0a and guaranteed 1.7a. this restricts the maximum output current, i omax , based on equation 7: where: i l = mosfet current limit i l-avg = average inductor current ? i l = inductor ripple current v diode = schottky diode forward voltage, typically, 0.6v f s = switching frequency, 600khz or 1.2mhz d = mosfet turn-on ratio: table 1 gives typical maximum i out values for 1.2mhz switching frequency and 10h inductor. cascaded mosfet application an 25v n-channel mosfet is integrated in the boost regulator. for the applications where the ou tput voltage is greater than 25v, an external cascaded mosfet is needed, as shown in figure 13. the voltage rating of the external mosfet should be greater than a vdd . table 1. maximum i out values v in (v) v out (v) i omax (ma) 2.5 5 870 2.5 9 500 2.5 12 380 3.3 5 1150 3.3 9 655 3.3 12 500 5 9 990 5 12 750 i l i l-avg 12 ?? i l ? ?? + = (eq. 7) ? i l v in v o v diode + ?? v in C ?? ? lv o ? v diode ? f s ? + ? --------------------------------------------------------------- -------- - = (eq. 8) i l-avg i out 1d C ------------ - = (eq. 9) d1 v in v out v diode + -------------------------------------- - C = (eq. 10)
fn6454 rev 4.00 page 8 of 9 february 16, 2012 ISL97519 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2007-2012. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. dc path block application note that there is a dc path in the boost converter from the input to the output through the inductor and diode, hence the input voltage will be seen at output with a forward voltage drop of diode before the part is en abled. if this voltage is not desired, the following circuit can be inserted between input and inductor to disconnect the dc path when the part is disabled. figure 13. cascaded mosfet topology for high output voltage applications intersil ISL97519 lx fb a vdd v in figure 14. circuit to disconnect the dc path of boost converter input en to inductor
ISL97519 fn6454 rev 4.00 page 9 of 9 february 16, 2012 package outline drawing m8.118a 8 lead mini small outline plastic package (msop) rev 0, 9/09 plastic or metal protrusions of 0.15mm max per side are not dimensions d and e1 are measured at datum plane h. this replaces existing drawing # mdp0043 msop 8l. plastic interlead protrusions of 0.25mm max per side are not dimensioning and tolerancing conform to jedec mo-187-aa 6. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: detail "x" side view 1 typical recommended land pattern top view side view 2 included. included. gauge plane 33 0.25 c a b b 0.10 c 0.08 c a b a 0.25 0.55 0.15 0.95 bsc 0.18 0.05 1.10 max c h 4.40 3.00 5.80 0.65 3.00.1 4.90.15 1.40 0.40 0.65 bsc pin# 1 id detail "x" 0.33 +0.07/ -0.08 0.10 0.05 3.00.1 1 2 8 0.860.09 seating plane and amse y14.5m-1994.


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